![]() Table below indicates the behavior of the Four bit BCD decimal counter. The design of the counter included five 7490 chips, five 7448 BCD converters, five seven segment displays, two switches (one to clear/reset the counter, and another to stop/continue the stop clock), and one AND gate. The counter was designed using Four bit BCD decimal counter (7490 TTL chip). The counter / stop clock / stopwatch was the simplest module of the Digital clock. The figure below shows the top-down approach used to modularize the design. The Digital Clock had three parts to it: Clock having Hour hand, Minute hand, and Second hand Date having month and day counter having seconds and seconds/100. Modular approach to solving the Digital clock designĪ modular approach was used to break the design in a top-down fashion.I have been recently working on a simple EEPROM programmer using only 74XX series logic. I am currently using Logicworks to simulate my design. PORT IN PART LOGICWORKS DOWNLOADĬlick on logic works to download the tool, which is very useful for designing with logic chips, my design is attached to this post.Ī bit of reference. ![]() Most parallel EEPROMs contain three control signals write enable, chip enable, and output enable. (Active Low) So for a basic write procedure you would want the chip enabled (Low), the output disabled (High), and to start the Write disabled (High). You would then put the address you would like to program your data into on the address bus pins, and the data you want to program on the data bus pins. ![]() If you then transition Write from disabled (High) to enabled (Low) you would program that data on the data bus into the address on the address bus. It got me to thinking, could I use shift registers and counters to do this automatically? By the miracle of logic works I think I have. The flow of steps is simple.ġ.) Shift data into a 8-bit serial to parallel register one bit at a time (8 clock cycles)Ģ.) On the 9th clock cycle toggle write enable (one clock cycle)ģ.) On the 10th clock cycle count up the address and clear the serial to parallel register (one clock cycle)Ĥ.) Go to step one and repeat until you have programmed every adress up to the highest address. To explain this in terms of my schematic. The lower 74LS595 accepts a toggle button (for now) which simulates data in. Each time the clock source pulses is shifts in a bit of data into the 74LS595 register. The 74LS590 8-bit counter directly above the 74LS595 then counts up. When it 74LS590 reaches the 9th count and all 8-bits of data have been shifted in, it triggers a NAND gate whose output will be connected to the write enable pin on the EEPROM. One the 10th cycle another NAND gate triggers the clear pin on the 74LS595 and the clock pins on the upper two cascaded 74LS590s which are keeping track of the 16-bit address. Then the cycle continues until you reach the upper address which toggles the output enable pins to shut down for the whole design. This current design focuses around programming a 32KB x 8-bit CAT28C256, but the design could be expanded for any size EEPROM with any word length given the EEPROM has active low control signals, which most EEPROMs have. My problem is developing input from a computer. I have considered using an RS232 to TTL adapter, but I am not use how I would implement the clocking. ![]() I am looking for a simple solution to send a data and clock line directly from my computer without using a micro-controller. If anyone has any suggestions I would greatly appreciate it. Thanks for the circuit description!Ī small point relating to your description of programming parallel EEPROMs: it's not necessary to drive -CS low before presenting the address and data you just need to have it low in conjunction with -WE being low, to program a byte. In fact the data sheet for the CAT28C256 says that you could even tie -WE low and use -CS to initiate a byte program operation. Your schematic shows a whole lot of rectangles connected to the outputs of the ICs. This isn't a symbol I've ever seen before. I guess they are Logicworks' way to indicate signal states? Most of them need to be connected to the socket for the device being programmed (But not the outputs of the control counter.) If you can't show them connecting to the actual programming socket, you should at least identify them with signal names (e.g. Also your OEN and CEN labels don't seem to be attached to the relevant gate outputs they're just nearby.ĮE_A0, EE_A1 etc) and perhaps socket pin numbers. It would also help if you assigned references to the ICs, so we don't have to identify them as "control counter", "address counters" etc!Īnother small point: I don't think there's any need for the HC595's -SRCLR input to be connected to the main clear signal. You're clocking data through the shift register constantly anyway. I would tie it high to show that it's not relevant.
0 Comments
Leave a Reply. |
AuthorWrite something about yourself. No need to be fancy, just an overview. ArchivesCategories |